fungierend

Im Interesse einer Kostenoptimierung lassen sich auf diese Weise nicht nur anwendungsspezifisch unterschiedliche busprotokollfähige Microcontroller frei wählen, um mit dieser in der überwiegenden Mehrzahl von Anwendungsfällen gleichermaßen benötigten Funktionalität zu kooperieren. Weil die für Spannungsregler in Frage kommenden Technologien aus physikalischen Gründen wesentlich größere Systemmaße als die Niedervolttechnologien für Analog- und Digitalanwendung in A/D-Microcontrollern aufweisen, wird die im Spannungsregler problemlos reproduzierbare Robustheit bezüglich Überspannungen, Transienten, Hochfrequenzeinstrahlung etc. in die Transceive-Funktion zwischen Bus (fungierend als "Antenne" für Störeinwirkungen) und Microcontroller erfüllende Schaltkreisfunktion importiert, die somit im Hinblick auf die Störsicherheit zugleich wie ein Schutzbauteil gegen alle erdenklichen Störungen vom Bus und vonseiten der Stromversorgung eines entsprechenden Gerätes wirkt. Im Effekt bedeutet dies, daß die hohen Isolationsanforderungen zwischen dem gleichspannungsgekoppelten Zweidraht-Bus und hochsensibler Niederspannungslogik so ideal erfüllbar sind, und zwar unter weitestgehendem Verzicht auf kostenintensive und Bauraum beanspruchende Schutzmittel.

40 & 41, requires no fault compensation and can be integrated very easily, with a hdd regulator connected; FIG. 43 is a schematic diagram of an alternative circuit which allows direct regulation on the bus core BUS_L of a keying potential to be dominantly impressed thereon and, at the same time, uses the external microcontroller for fault compensation; FIG. 44 shows a modification of the circuit according to FIG. 43 which, by means of a sample-&-hold device, makes it possible to dispense with a microcontroller for the purpose of compensation, applicable to the bus core BUS_L; FIG. 45 shows a schematic diagram of alternative for feeding onto the bus core BUS_L a source potential having a variable offset with respect to the normal dominant potential; FIG. 46 shows a block diagram of a reception block within a bus transceiver which is equipped with additional means for the detection and analysis of bus faults; FIG. 47 shows a function block diagram of a developed reception block within a bus transceiver which is equipped with further developed means for the analysis of faults and for the testing of other bus subscribers in cooperation with transmitting means of the circuits; FIG. 48 is a schematic diagram of part of FIG. 47; FIG. 49 shows a first block circuit diagram, reduced for a particular application, of additional means in accordance with FIG. and FIG. 47, relating to the receiving end of a bus transceiver; FIG. 50 shows a second block circuit diagram, reduced for particular application purposes, of additional means in accordance with FIG. and FIG. 47, relating to the receiving end of a bus transceiver; FIG. 51 shows a third block circuit diagram, reduced for particular application purposes, of additional means in accordance with FIG. and FIG. 47, relating to the receiving end of a bus transceiver; FIG. 52 shows a fourth block circuit diagram, reduced for particular application purposes, of additional means in accordance with FIG. and FIG. 47, relating to the receiving end and the transmitting end of a bus transceiver; FIG. 53 shows a schematic circuit diagram of a development detail for the acquisition and transmission of a reference-ground potential difference to an external microcontroller; FIG. 54 shows a schematic illustration of a central element within the block function in FIG. 28 or ? in FIG. 47 which generates all the control signals and value specifications for the potential-specific influencing of the transmitting and receiving means of the transceiver; FIG. 55 shows the functional allocation of a semiconductor substrate which integrates all of the functionalities described.